The Leader’s Weekly Schedule – Week of 11/13/17


WEEK OF NOVEMBER 13TH

MONDAY, NOVEMBER 13TH
On Monday, the House will meet at 12:00 p.m. for morning hour and 2:00 p.m. for legislative business. Votes will be postponed until 6:30 p.m.

Legislation Considered Under Suspension of the Rules:
1) H.R. 3973 – Market Data Protection Act of 2017, as amended (Sponsored by Rep. Warren Davidson / Financial Services Committee)

2) H.R. 2331 – Connected Government Act, as amended (Sponsored by Rep. Robin Kelly / Oversight and Government Reform Committee)

3) H.R. 3071 – Federal Acquisition Savings Act of 2017, as amended (Sponsored by Rep. Buddy Carter / Oversight and Government Reform Committee)

4) H.R. 3739 – Presidential Allowance Modernization Act of 2017, as amended (Sponsored by Rep. Jody Hice / Oversight and Government Reform Committee)
H.Res. 599 – Expressing the sense of the House of Representatives with respect to United States policy towards Yemen, and for other purposes (One Hour of Debate) (Sponsored by Rep. Ro Khanna / Foreign Affairs Committee)

TUESDAY, NOVEMBER 14TH
On Tuesday, the House will meet at 10:00 a.m. for morning hour and 12:00 p.m. for legislative business.

Legislation Considered Under Suspension of the Rules:
1) H.R. 1207 – To designate the facility of the United States Postal Service located at 306 River Street in Tilden, Texas, as the “Tilden Veterans Post Office” (Sponsored by Rep. Henry Cuellar / Oversight and Government Reform Committee)

2) H.R. 3109 – To designate the facility of the United States Postal Service located at 1114 North 2nd Street in Chillicothe, Illinois, as the “Sr. Chief Ryan Owens Post Office Building” (Sponsored by Rep. Darin LaHood / Oversight and Government Reform Committee)

3) H.R. 3893 – To designate the facility of the United States Postal Service located at 100 Mathe Avenue in Interlachen, Florida, as the “Robert H. Jenkins Post Office” (Sponsored by Rep. Ted Yoho / Oversight and Government Reform Committee)
Consideration of the Conference Report to Accompany H.R. 2810 – National Defense Authorization Act for Fiscal Year 2018 (Subject to a Rule) (Sponsored by Rep. Mac Thornberry / Armed Services Committee)

H.R. 2874 – 21st Century Flood Reform Act (Subject to a Rule) (Sponsored by Rep. Sean Duffy / Financial Services Committee)

WEDNESDAY, NOVEMBER 15TH AND THE BALANCE OF THE WEEK
On Wednesday, the House will meet at 10:00 a.m. for morning hour and 12:00 p.m. for legislative business.

On Thursday, the House will meet at 9:00 a.m. for legislative business.

Legislation Considered Under Suspension of the Rules:
1) H.R. 4174 – Foundations for Evidence-Based Policymaking Act of 2017, as amended (Sponsored by Rep. Paul Ryan / Oversight and Government Reform Committee)

2) H.R. 2672 – To designate the facility of the United States Postal Service located at 520 Carter Street in Fairview, Illinois, as the “Sgt. Douglas J. Riney Post Office” (Sponsored by Rep. Cheri Bustos / Oversight and Government Reform Committee)

3) H.R. 2873 – To designate the facility of the United States Postal Service located at 207 Glenside Avenue in Wyncote, Pennsylvania, as the “Staff Sergeant Peter Taub Post Office Building” (Sponsored by Rep. Brendan Boyle / Oversight and Government Reform Committee)

4) H.R. 3369 – To designate the facility of the United States Postal Service located at 225 North Main Street in Spring Lake, North Carolina, as the “Howard B. Pate, Jr. Post Office” (Sponsored by Rep. Richard Hudson / Oversight and Government Reform Committee)

5) H.R. 3821 – To designate the facility of the United States Postal Service located at 430 Main Street in Clermont, Georgia, as the “Zachary Addington Post Office” (Sponsored by Rep. Doug Collins / Oversight and Government Reform Committee)
H.R. 1 – Tax Cuts and Jobs Act, Rules Committee Print (Subject to a Rule) (Sponsored by Rep. Kevin Brady / Ways and Means Committee)

Additional Legislative Items are Possible
Committee activity for the week of November 13 can be found here.

Source: The Leader’s Weekly Schedule – Week of 11/13/17

As Embedded Vision Takes Off, Software Frameworks Bear Watching | IoT & M2M


Compared to a CPU or GPU system, an embedded vision system must offer equivalent performance at a fraction of the power and die area.

Embedded vision applications are highly optimized heterogeneous systems, which means they have processing units that are optimized for their specific task: a scalar unit for control, a vector unit for pixel processing, and a dedicated CNN (convolutional neural networks) engine for executing deep learning networks.

These units, specifically optimized for embedded vision applications, provide excellent performance for the smallest area and power. When evaluating software frameworks for the final vision application, requirements around availability, bit resolution, graph mapping tools, and optimization options for hardware should be taken into consideration.

Source: As Embedded Vision Takes Off, Software Frameworks Bear Watching | IoT & M2M

Arm Technology | Arm Bus Reconfigurable Accelerators with Embedded FPGA


This article explains how chip designers can used embedded FPGA to implement reconfigurable accelerators on Arm buses (AXI, AHB, even APB). Specialized accelerators can achieve performance much higher than a processor such as Arm, ARC and MIPS, and a reconfigurable accelerator can be reprogrammed to accelerate multiple tasks instead of just one.

In addition, new accelerators can be added at any time, just like a firmware update.

Source: Arm Technology » Arm Bus Reconfigurable Accelerators with Embedded FPGA

Embedded FPGAs Offer SoC Flexibility | Chip Design


It was back in 1985 that Ross Freeman invented the FPGA, gaining a fundamental patent (#4,870,302) that promised engineers the ability to use “open gates” that could be “programmed to add new functionality, adapt to changing standards or specifications, and make last-minute design changes.”

Freeman, a co-founder of Xilinx, died in 1989, too soon to see the emerging development of embedded field programmable logic arrays (eFPGAs). The IP cores offer system-on-chip (SoC) designers an ability to create hardware accelerators and to support changing algorithms. Proponents claim the approach provides advantages to artificial intelligence (AI) processors, automotive ICs, and the SoCs used in data centers, software-defined networks, 5G wireless, encryption, and other emerging applications.

With mask costs escalating rapidly, eFPGAs offer a way to customize SoCs without spinning new silicon. While eFPGAs cannot compete with custom silicon in terms of die area, the flexibility, speed, and power consumption are proving attractive.

Source: Embedded FPGAs Offer SoC Flexibility | Chip Design

A Healthy Future for Machine Learning | Medical, eHealth & Home Health


Intel® CEO Brian Krzanich believes that Artificial Intelligence (AI) will be “transformative.”

He announced at this month’s WSJ D.Live  technology conference that Intel will soon ship the industry’s first silicon neural network processor, the Intel® Nervana™ Neural Network Processor (NNP).

Its architecture is purpose built for deep learning with no standard cache hierarchy and with on-chip memory that is managed directly by software to handle the large amounts of compute performance and accelerate the training time for deep learning.

Source: A Healthy Future for Machine Learning | Medical, eHealth & Home Health

How the Embedded Space is Learning to ‘Mind the Gap’ | Military, Aerospace & Avionics


.. In the embedded space we also need to “mind the gaps.” We can be very good at talking about exciting new products at the launch of new generation processor/FPGA/GPU and why these products are better/faster/smaller etc. We tend to forget that many embedded markets—especially those in the defense and transportation sectors—are pragmatically resistant to change and have a critical need to connect modern and legacy interfaces.

These legacy interfaces can be generic-based connections like standard serial ports as well as manufacturer-specific, such as those found on avionics devices. Irrespective, these are the gaps as they are no longer, or in some cases never were, an integral part of the processor chipset.

To be usable deployed assets, most defense devices need to connect to an Ethernet-based network. At the same time many of the deployed legacy instruments, radios, and sensors do not have Ethernet ports, they only provide a serial port interface, which is usually RS-232/422/485.

To make matters more interesting, the applications and drivers used to control and communicate with these legacy devices may only be verified on older operating systems that are not compatible with the latest computer technology.

Source: How the Embedded Space is Learning to ‘Mind the Gap’ | Military, Aerospace & Avionics

Renesas, Toyota, and Denso Bring Autonomous-Driving Vehicles to Market Faster | Automotive & Connected Car


Renesas Electronics Corporation (TSE: 6723), a premier supplier of advanced semiconductor solutions, today announced that its automotive technologies will drive Toyota Motor Corporation’s (TSE: 7203) autonomous vehicles, which are presently under development and scheduled for commercial launch in 2020.

Selected by Toyota and Denso Corporation (TSE: 6902), Renesas’ autonomous-driving vehicle solution for Toyota’s autonomous vehicles combines the R-Car system-on-chip (SoC), which serves as an electronic brain for in-vehicle infotainment and advanced driver-assistance systems (ADAS), and the RH850 microcontroller (MCU) for automotive control.

This combination delivers a comprehensive semiconductor solution that covers peripheral recognition, driving judgements, and body control.

Source: Renesas, Toyota, and Denso Bring Autonomous-Driving Vehicles to Market Faster | Automotive & Connected Car

Reuse and Cost Savings in an Airborne Display Controller Application | Military, Aerospace & Avionics


Power, flexibility, and processing performance which compare favorably to a software-based approach are among the advantages of selecting an FPGA-based solution for custom video processing and control applications. The wide array of available Intellectual Property (IP) cores is another plus. Additional functions must be included in the design to accomplish a fully featured LCD Controller, such as a Display Data Channel (DDC) interface and an on-screen display menu, which are general-purpose display controls.

This design challenge centers around a special application, with a heavy emphasis on the raster/stroke conversion.

Source: Reuse and Cost Savings in an Airborne Display Controller Application | Military, Aerospace & Avionics

Artificial Intelligence: Where FPGAs Surpass GPUs | FPGA, PLD & SoC Solutions


Artificial Intelligence (AI) will transform how we engage with the world and is already the fastest growing workload for data centers. Field Programmable Gate Arrays (FPGAs) can accelerate AI-related workloads.

It makes perfect sense that Intel purchased Altera, a leading company specializing in FPGAs, in December 2015 (for $16.7 billion). Intel has integrated Altera’s IP to improve performance and power efficiency and to enable reprogramming for custom chips that account for a more significant share of server chip shipments.

Intel’s Data Center Group is the most profitable group at Intel, driven by the growth in “big data” and cloud servers. AI is one of the fastest growth drivers for cloud services.

Source: Artificial Intelligence: Where FPGAs Surpass GPUs | FPGA, PLD & SoC Solutions

Reading Our Brain Chemistry


“Neurons can be read two ways: electrically or chemically,” says Guillaume Petit-Pierre, a post-doc researcher at LMIS4 and one of the study’s authors.

“Reading their electrical behavior can provide some limited information, such as the frequency and pace at which neurons communicate. However, reading their neurochemistry gives insight into the proteins, ions and neurotransmitters in a patient’s cerebral fluid.” By analyzing this fluid, doctors can obtain additional information – beyond that provided by neurons – and get a complete picture of a patient’s brain tissue metabolism.

Source: Reading Our Brain Chemistry