Intel Shows Next Steps in Packaging | EE Times

Intel gave a first glimpse of three packaging technologies on its roadmap at a gathering on the sidelines of Semicon West here. The most interesting of the three may debut in the exascale supercomputer Intel is building for the U.S. Department of Energy.

The trio of techniques aim to give Intel’s processors an edge at a time when advances in conventional silicon scaling are slowing and getting more expensive. They arrive as rival TSMC expands its portfolio of chip stacks, and two consortia hope to set standards in the area.

Source: Intel Shows Next Steps in Packaging | EE Times

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